Quarterly |
Activites |
September - December 2009 |
- Meeting with FES and FEGT staff on VLSI curriculum, 2-Sep-09, 10:00am - 12:00pm, UTAR Kampar
- Participant: FES and FEGT staff
- Outcome: Some suggestions on curriculum improvement have been made
- Meeting with USAINS Group on possible collaboration in curriculum and R&D, 26-Nov-09, 2:00pm - 4:00pm in UTAR PJ
- Participant: VP (RDC), UTAR, USAINS Group
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March - August 2009 |
- Discussion on Possible Research and Training Activities in VLSI with Lee Sze Wei, Lim Soo King, Wang Chan Chin, 5-Feb-09
- Outcome: The discussion ended with a plan for CM Tang to visit FES and FSET for meetings and discussions with relevant faculty staff
- Talk titled "Ten Generations of Process Technology in 20 Years - A Designer's Odyssey" was delivered by CM Tang at FES, UTAR, 15-Apr-09, 2pm
- Outcome: The talk and Q&A session were beneficial to the student and academic community in UTAR as far as industry practices and trends are concerned
- Dialog session with relevant staff of FES, Dept of Electrical and Electronic Engineering, FES, 15-Apr-09, 4pm.
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Outcome: CM Tang was given an overview of the currciculum of Bachelor of Engineering (Hons) Electrical and Electronic Engineering and Bachelor of Engineering (Hons) Electronic and Communications Engineering.
- Discussion of skill expectation of industry on electronic engineering graduates was held and some ideas of addressing such needs in curriculum were also discussed.
- Appointment of CM Tang as Faculty Industrial Advisor (FSET ' FEGT), 1-Apr-09.
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April - June 2010 |
- Setting up of VLSI lab in UTAR Kampar, ongoing, UTAR Kampar
- Participant: FES and FEGT staff
- Outcome: Providing advice on the setup of the lab
- Planning training for staff of UTAR teaching VLSI subjects, ongoing, UTAR Kampar
- Participant: FES and FEGT staff
- Outcome: Being the trainer for the programme to start in Sep 2010
- Chairing of VLSI centre of UTAR, ongoing, UTAR Kampar & KL
- Participant: FES and FEGT staff
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July - September 2010 |
- Conducting series of VLSI training
- Planning to start a VLSI design project
- Chairing of VLSI centre of UTAR
- Meeting with industry collaborators e.g. Intel & Infineon
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October - December 2010 |
- Conducting series of VLSI training in UTAR Kampar, currently focusing on design project based training.
- Chairing of UTAR VLSI centre
- Preparing for the first subject in VLSI to be introduced in FEGT in UTAR Kampar
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January - March 2011 |
- Conducting series of VLSI training for staff from FES and FEGT(Ongoing). Currently focusing on design project based training.
- Chairing of VLSI centre of UTAR (Ongoing).
- Preparing for the second subject in VLSI to be introduced in FEGT (Ongoing).
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April - June 2011 |
- Conducting series of VLSI training
- Chairing of VLSI centre of UTAR
- Doing minor revision to VLSI subject content
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July - September 2011 |
- Conducting series of VLSI training for FEGT staff. Currently focusing on design project based training (On-going)
- Chairing of VLSI Centre of UTAR (On-going)
- Doing minor revision to VLSI subject content (On-going)
- Guiding postgraduate candidates (On-going)
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October - December 2011 |
- Conducting series of VLSI training for FEGT staff. Currently focusing on design project based training (On-going)
- Chairing of VLSI Centre of UTAR (On-going)
- Guiding postgraduate candidates (On-going)
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January - March 2012 |
- Conducting series of VLSI training for FEGT staff. Currently focusing on design project based training (On-going)
- Chairing of VLSI Centre of UTAR (On-going)
- Guiding postgraduate candidates (On-going). Currently, two postgraduates undergoing training at CM Tang's office in Shanghai (Feb - Mar 2012). CM Tang has given a talk on 30th January, 2012, 2pm. The title of his talk is "A New Dimension in VLSI Design".
- He is currently the external consultant for a postgraduate student who has registered his Master's studies with FEGT.
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April - June 2012 |
- Conducting series of VLSI training for FEGT staff. Currently focusing on design project based training (On-going)
- Chairing of VLSI Centre of UTAR (On-going)
- Guiding postgraduate candidates (On-going). Currently, two postgraduates undergoing training at CM Tang's office in Shanghai (Feb - Mar 2012). CM Tang has given a talk on 30th January, 2012, 2pm. The title of his talk is "A New Dimension in VLSI Design".
- He is currently the external consultant for a postgraduate student who has registered his Master's studies with FEGT.
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July - September 2012 |
To be part of the examining committee for proposal defences by MEngSc candidates, Mr Lim Zhen Ning and Mr Dicky Hartono |
October - December 2012 |
- Chairing of VLSI centre of UTAR
- Guiding postgraduate candidates (Currently, two postgraduates under co-supervision of CM Tang)
- Regular visit and meeting at UTAR ( Regular meetings with research postgraduates)
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January - March 2013 |
- Meeting and discussion with postgraduate students at least once a week through Skype
- Will be visiting UTAR on 1st & 2nd April 2013
- Has started the new cycle of UTARRF project.
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April - June 2013 |
- Training of master postgraduates on VLSI
- VLSI research project to develop very low power multi-core processor
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July - September 2013 |
- Continue to guide and supervise 3 master postgraduates in VLSI.
- Help to recruit one more postgraduate in VLSI in Oct 2013
- Will present papers together with master postgraduates in a conference in Indonesia and now in process of preparing the papers.
- Hosted the students for industrial attachment in Shanghai, May - Sep 2013.
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October - December 2013 |
- Presented 3 conference papers in Indonesia together with the three postgraduates under his supervision.
- Hosted one postgraduate for industrial attachment in Shanghai.
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January - March 2014 |
- Visited UTAR Kampar: Feb 2014
- Continuing the supervision of 4 master postgraduates in VLSI
- Awarded an UTARRF for a VLSI project in Cycle 2, 2013 - project commenced in Jan 2014
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April - June 2014 |
- Continue the supervision of 4 postgraduates in VLSI as FEGT.
- Chairing of VLSI centre
- Preparing the final stage of taping out the multi-core processor design for IC fabrication
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July - September 2014 |
- Chairing of VLSI RC
- Supervising master postgraduates in FEGT.
- PI for UTARRF projects
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October - December 2014 |
- Attended the BOE / viva for a master postgraduate
- Conducted RC meeting
- Conducted presentation on future direction and research focus of RC
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January - March 2015 |
- 1 master student graduated with MEngSc at FEGT.
- Recruited a new master student for VLSI research.
- Visited FEGT on 27 Feb 2015
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April - June 2015 |
- 2015 VLSI Seminar
- Supervision of final year project
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July - September 2015 |
- Final Year Project Assessment
- Proposal Defense
- Final Year Project Supervision
- Informal dialogue session
- Postgraduate Supervision
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October - December 2015 |
- No activity reported for this quarter.
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January - March 2016 |
- Work Completion Seminar - Mr. Arya Wicaksana
- Appointment of internal examiner for Arya Wicaksana
- Appointment of internal examiner for Felix Lokananta
- Board of Examination Viva-voce (BoE Viva) for Felix Lokananta
- Postgraduate and undergraduate final year project supervision
- Price commitment from Cadence for UTAR
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April - June 2016 |
- Board of Examiners Meeting (for the Examination of Dissertation)
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July - September 2016 |
- ICP meeting with Prof. Lee and Silterra.
- CVLSIR meeting
- Assessment of Master of Science by research student dissertation submission
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October - December 2016 |
- Industry-University Link Forum
- Launch of the RUMPS401
- Centre meeting
- Member of Centre of Very Large Scale Integration Research meeting Vice President (R&D and Commercialization)
- Technical Seminar and Workshop Series
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January - March 2017 |
- Centre meeting on 9 March 2017
- Renewal of ICP was submitted on 11 Jan 2017
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April - June 2017 |
- 1. Welcoming new member to CVLSIR : Dr. Soh Chit Siang
- 2. Welcoming new member to CVLSIR : Mr. Yang Chuan Choong
- 3. UTARRF 2017 Cycle 1: Project Number IPSR/RMC/UTARRF/2017-C1/T03. Funding for a new project "Extreme low power encription decryption unit for IoT"
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July - September 2017 |
- Centre for Very Large Scale Integration Research meeting
- "UTARRF 2017 Cycle 1:
- Project Number IPSR/RMC/UTARRF/2017-C1/T03"
- Request by ARM to have some information on UTAR RUMPS401 chip
- Registration of Master of Engineering Science student: Electronic System Level Virtual Platforming Design for Hardware and Software Co-design of a Secure System for Intelligent Internet of Things
- Registration of Master of Engineering Science student: Hardware and Software Co-development for a Secure and Intelligent Internet of Things System
- WCS conducted in FEGT: Design of Software Defined Radio-based RF Transceiver for IoT in Multi-Processor System On Chip - a Preliminary Review.
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October - December 2017 |
- VLSI Research centre meeting was held on Wednesday, 29 November 2017, 4 pm in E018A, VLSI Design Lab.
Mr. CM Tang and Dr. Yap V. V. visited Universitas Multimedia Nusantara Jakarta on 1 December 2017 to attend the university's convoction.
- The Master of Engineering Science students' application for VISA was finally approved. One student arrived on 6 November 2017, and the other arrived on 25 November 2017. Mr. CM Tang's visit to welcome these two students closed the day with dinner in a restaurant.
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January - March 2018 |
- The two postgraduates spent the CNY break with Mr. CM Tang in
Kuala Lumpur. Basically the students are making good progress getting
up to speed with using the RUMPS401.
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April - June 2018 |
- Attended CVLSI meeting on 24 May 2018
- Attended proposal defence for Vincentius Kurniawan on 24 May 2018
- Visited GLX Technologies Sdn Bhd with Dicky Hartono, Lim Zhen
Ning, and two other member of staff of GL on 23 May 2018
- Synopsys licensing - CM Tang has agreement from Wong of ICE that
Synopsys licensing to have back-end and front-end licenses double up
if only BE or FE licenses are used. He has also negotiated for the
licenses in Kampar to be shared by Sungai Long. This arrangement
requires ITISC to setup dedicated port for access to licenses in the
server in Kampar.
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July - September 2018 |
- To give a talk in a workshop in Arm Research Summit on UTAR RUMPS401 SOC.
- The third-annual Arm Research Summit – an academic summit to discuss
future trends and disruptive technologies across all sectors of computing
will be returning to Cambridge, UK on 17-19 September 2018. ARM
DesignStart has invited a relevant UTAR professor to give a talk in a
workshop organizing in this year’s Summit. Mr. CM Tang has accepted the
invitation to deliver the talk from 17-19 September 2018 at Robinson
College, Cambridge, UK.
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October - December 2018 |
- 10th UTAR R&D Colloquium 2018 (2.0) on 24 Nov 2018 -- Title of the
talk by Dicky Hartono is "RUMPS401 MPSoC for IoT System and
Education". Dicky Hartono is an alumni of UTAR graduated under MEngSc
co-supervised by Mr. Tang Chong Ming.
- UTAR Sg Long & Intel Collaboration meeting on 11 Dec 2018 -- The
meeting is to discuss about these agendas: 1. Intel-UTAR lab
assignment for UEEA2223 Integrated Circuit Design, 2. VLSI Lab project
proliferation plan to UTAR Sg. Long, 3. Industrial training students'
Final Year Project and IMDC, 4. MOE-linked Elite Internship Program
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